FPGA replacement for VIC I chip?

[Kakemoms]

You can start with the pictures here and make a transistor-level model if you have *some* spare time to kill..

Still, since one can get "new" parts, someone probably saved the original mask design? Making new designs will be somewhat costly, but not undo-able. Looks like a chip with two or three metal layers. When I get retired in 22 years I may consider it

[groepaz]

the mask wont help much, you'll need the schematic and produce a new mask for a more modern process that you can actually manufacture for reasonable cost

the "new" parts that are in the market are just NOS - if they'd actually be "new" then they'd be much more expensive

[eslapion]

i doubt that will happen in the near future, they'd still cost a lot more than a real IC when it is feasible, we'll do it i guess (although starting with VIA or CIA, because these are easier to get 100% right)

I made an operational clone of a 8521 - a prototype, that is. It requires a XC95288XL loaded to its maximum capacity along with another XC9572XL because the routing capacity of the first chip is exceeded.

It works allright but I'm not going to start selling that anytime soon... the 288XL alone costs 21$US.

Not a very profitable venture.

Now, I just want to note the 8521 doesn't require 288 macrocells, it's the routing table that forces the usage of a second chip.

Also, since the 288XL is 20x20mm, this will not physically fit in just about every C64/C128 unless you make a sort of "stilt-pins" setup like I did and then you can't close the case.

As for the VIAs, they are slightly less complex but WDC still makes excellent CMOS versions, the NMOS compatible variant are called W65C22N and use less than 1/10th the power of the original chips and yes, after verification, they are 100% compatible with the original chips.

Making VHDL based VIAs into CPLD or FPGAs would cost at least 25$ per unit while the W65C22N sell for $6.95 each, $5.95 each if you order 10 or more (http://www.mouser.com). Truly not worth cloning.

If you have a schematic for the 6560/6561, by all means please bring it in. I'll be all to happy to take a look at the resource requirements for its implementation into a programmable logic chip.

[groepaz]

If you have a schematic for the 6560/6561, by all means please bring it in.

that hasnt surfaced yet unfortunately

I'll be all to happy to take a look at the resource requirements for its implementation into a programmable logic chip.

well, for that you could always rip out the VIC out of wolfangs core (fpga arcade) and then monkey patch it until it compiles standalone (it doesnt really have to work, shouldnt make a big difference in terms of size anyway)

[eslapion]

MikeJ (fpgaarcade) posted a VHDL version of a complete VIC-20 in jan. 2008.

It uses the T65 core to reproduce the 6502 and include VHDL models of both the 6522 and 6561. The 6561 model outputs in RGB 12 bit.

Not sure this file can still be found on the web, the filename was "vic20_rel002_sp3e.zip" - google doesn't give any results. Fortunately, its in my archives.

Apparently, that was designed for a Xilinx FPGA spartan 3e.

[groepaz]

ah yes, it was mikes not wolfgangs.... the sources can be found on the fpga-acrade svn, its linked on their website somewhere

[lance.ewing]

You can start with the pictures here and make a transistor-level model if you have *some* spare time to kill.. ...When I get retired in 22 years I may consider it

That die shot has been fascinating me for the past few years now. I've spent literally hours at a time staring at it and trying to work it out. My VIC 20 hobby projects seem to be toggling between writing emulators and trying to work out that die shot. Unfortunately its only the one photo showing all layers. The metal layer is easy to see but the poly and diffusion are often hard to work out. The poly and diffusion lines are fairly easy to spot, pass transistors also fairly easy to recognise, but I get completely lost trying to work out the boundaries of the poly and diffusion areas used in the logic gates.

[eslapion]

... I've spent literally hours at a time staring at it and trying to work it out. My VIC 20 hobby projects seem to be toggling between writing emulators and trying to work out that die shot.

I strongly suspect trying to work out this photo is a waste of time.

For one thing, you're more or less looking at layers of photolithographic material stacked on top of one another so its like looking at a semi-transparent layer cake from the top and trying to guess what comes from what layer.

Also, the manufacturing process involved isn't used anymore.

If one was to make a new video chip for the VIC-20, it would involve modern technology tuned down to operate well below its actual limits.

It's been the same thing for PLAnkton. Me and Fredric used the XC9536XL because:
1. Its very small so it fits on the limited space while not needing special equipment for soldering
2. Its the least expensive chip that does the job

Much less complex chips like a GAL22V10 could have done the job but it's actually more expensive.

The XC9536XL is actually capable of running more than 10 times faster than is needed to perform its job in the C64 and it is dense enough to do far more complex jobs than is required for the C64 PLA.

We had to tune down this chip by:
1. Programming it to operate in low power mode - which has the added benefit of reducing the workload on the power supply and eliminating all detectable heat
2. Setting all outputs to low slew rate - this reduces required power even further and eliminates all ringing

If you were to have a detailed photo of the insides of the XC9536XL, it resembles absolutely nothing like the insides (put online by Skoe) of a real MOS 906114-01 (aka 7700, aka 8700). In fact it would look considerably more complex but only about 1/3rd of this architecture is actually used.

Right now solutions like the fpga arcade replay board seem like a cost effective solution because you can have a huge number of routing connections to integrate all the emulated chips on a single IC. That was the limit with replicating the CIA, the number of connections, not the number of macrocells or logic gates.

[lance.ewing]

For one thing, you're more or less looking at layers of photolithographic material stacked on top of one another so its like looking at a semi-transparent layer cake from the top and trying to guess what comes from what layer.

Yeah, that's the main problem. If we had photos of each layer, like they did for the 6502, it would make it a lot easier.

Also, the manufacturing process involved isn't used anymore.

Last year I bought a copy of "Introduction to VLSI Systems" by Conway and Mead. The publication date seems to be around the time the VIC chip was designed, and a lot of what it says does appear to translate to what I'm seeing in the die shot. I'm interested more in how the original chip behaved rather than trying to create the equivalent with today's tech.

I strongly suspect trying to work out this photo is a waste of time.

Yeah, I often reach the same conclusion. That's why of late I've been spending a lot more time working on my emulator, as it feels like I'm achieving something. It's easy to waste a lot of time staring at that photo and get nowhere at all. Still, there seem to be people out there that can decode that photo, or certainly see a lot more than I can, and see it much quicker:

http://www.softwolves.com/arkiv/cbm-hac ... 15540.html

I get the feeling Segher could work out most of this chip fairly quickly.

[groepaz]

segher is out of this world when it comes to this kind of things, indeed

[eslapion]

I'm interested more in how the original chip behaved rather than trying to create the equivalent with today's tech.

Well, you got me there! I am completely baffled by that sentence.

Closely studying the behavior of the original C64 PLA is precisely what allowed me to create an equivalent with today's tech.

But then that's exactly what I did, study the original chip's actual behavior with an oscilloscope and logic analyzer, not the look of its insides.

[pixel]

I'd go for an interview with Al Charpentier, who probably could break it down to the essentials in ten minutes.

[groepaz]

Closely studying the behavior of the original C64 PLA is precisely what allowed me to create an equivalent with today's tech.

thats easy with something like the PLA - since its stateless... for something like the VIC its much harder, and a logic analyzer actually doesnt help a lot there (except for a couple very basic properties - which are not the problem at all anyway)

[eslapion]

Closely studying the behavior of the original C64 PLA is precisely what allowed me to create an equivalent with today's tech.

thats easy with something like the PLA - since its stateless... for something like the VIC its much harder, and a logic analyzer actually doesnt help a lot there (except for a couple very basic properties - which are not the problem at all anyway)

It's true the PLA doesn't use registered logic and is therefore not a state machine.

However my comment should remain in the context that it was an answer to the comment from lance.ewing about his interest being centered on the behavior of old circuits rather than the creation of a modern equivalent. IMHO, the latter necessarily involves the former.

[Kakemoms]

the mask wont help much, you'll need the schematic and produce a new mask for a more modern process that you can actually manufacture for reasonable cost

the "new" parts that are in the market are just NOS - if they'd actually be "new" then they'd be much more expensive

Oh, well I work in a cleanroom with all the tools available for a 0.7um process. Its not that strange, its just not a standard IC process you can buy off-the-shelf. And in 1980 it was all manual work, so it would be all-manual.

Still I doubt the masks are to be found after 35 years, so it would be the design file or a layout that would be needed. I think the original process of the 6502 was at 16um, so this is probably the same.

The size of the 6561 looks to be about 46 times the bonding pad, while the 6502 is about 36 times the bonding pad. Bonding pads has to be the same size, so it indicates that the 6561 is somewhat larger at around 36mm2 die size (6*6mm).

The 6502 has about 20 mask layers, so I recon the 6561 has the same. I won't need to cut it out in rubylith, but I need to put in every layer manually, which is time-consuming the first time (thus costly). It would take around 16-20 weeks and cost about 40-50K EUR for the cleanroom rent. The cheapest way would be to "train" a student.

The result? About 10 pcs of 4inc (100mm) wafers with devices at a laughable yield. And I haven't even mentioned packaging..

So, it won't happend soon.. but its not IMPOSSIBLE.