Not much time tonight, but did manage to get the VGA monitor to lock!
The SyncGen is a huge mess right now, but appears to be working.
I still have more testing to do before I can post photos or video.
For now, here is a schematic fragment showing the IO from the VIC-20 to the SyncGen...
Green lines are memory mapped IO from the VIC-20.
Blue and grey lines are internal to the logic on the board.
As shown, it takes 5 IO lines to completely program the Sync Generator.
I also came up with a way to have multiple resolutions, and even mixed resolutions.
For instance, half the screen can be 400x600 and the other half 400x300.
... Amiga style!
I am posting these mainly for my own reference.
It's easy to move fast on hardware and forget how things work!
I build mainly by instinct and then document later.
Notice I am using a 74HC193 counter in place of the 74HC74 flipflop.
As always, I find the 74HC74 to be a bit flaky as a Set/Reset system.
The counter removes all possible glitches, and startup instability.
Here is the nicely wired output section of the Video Generator.
This aligns the Sync, Pixel, and Blanking data with the 40MHz master clock...
Now here is the crazy mess I made testing the rest of the circuit.
This actually generates a blank 800 x 600 VGA signal to the exact spec...
I am using an AVR to simulate the VIC-20 IO, just until this works.
I don't want to short out the VIC accidentally, so I keep it off the board while I test new wiring.
When complete, there will be no "modern" tech allowed on the board at all.
Over the next few days, I hope to have some actual images displayed on the VGA.
Probably just a single buffer to allow for some image testing.
The most difficult part of a VGA generator is always the first and last pixel.
Half a nanosecond will mess with your life... really!
Later,
Radical Brad