Denial

nippur72 wrote: ↑Mon Jun 22, 2020 11:01 am I was able to setup the IDE and compile for the Mister.

I merged the the audio section of the 6561 I wrote for the MiST last year, indeed the Mister code was very old dating back to my intervention, so it also lacks all the improvements on the video section that have been written for the MiST in the while. It's a pity there there is no central repository with just one single implementation always kept update.

I've put the resulting .RBF file here if you want to give it a try. Consider that I don't own a Mister yet, so it was a completely "blind" build. It's the first ever Mister core that I compile, so I don't know if it starts at all.

Anyway, if everything is ok, you should be able to hear the voice in Berzerk MMX+. Please let me know.

Regarding the audio distortion you mentioned, I guess it's something that has to do with "audio mixing" outside of the VIC20 emulation. I don't know much of the Mister yet, the code looks foreign to me, also because it's a much more complex machine than the MiST. Apparently there is a HDMI audio, a SPDIF audio and normal audio. And also a "linux audio"!

The issue I supect might be here, but I'm totally clueless:

Code: Select all

always @(posedge clk) begin
	reg signed [16:0] a1, a2, a3, a4;

	a1 <= is_signed ? {ca[15],ca} : {2'b00,ca[15:1]};
	a2 <= a1 + {linux_audio[15],linux_audio};

	pre_out <= a2[16:1];

	case(mix)
		0: a3 <= a2;
		1: a3 <= $signed(a2) - $signed(a2[16:3]) + $signed(pre_in[15:2]);
		2: a3 <= $signed(a2) - $signed(a2[16:2]) + $signed(pre_in[15:1]);
		3: a3 <= {a2[16],a2[16:1]} + {pre_in[15],pre_in};
	endcase

	if(att[4]) a4 <= 0;
	else a4 <= a3 >>> att[3:0];

	//clamping
	out <= ^a4[16:15] ? {a4[16],{15{a4[15]}}} : a4[15:0];
end