It is IO BLock 3, starting at address 40,000 that I am mapping as IO.
I chose 40,000, as it's a nice easy number to remember.
Here is my current memory map...
Code: Select all
0000-03FF 00000-01023 System variables BLK 0
0400-0FFF 01024-04095 3K expansion RAM area B0
1000-1DFF 04096-07679 User Basic area B0
1E00-1FFF 07680-08191 Screen memory BLK 0
2000-3FFF 08192-16383 8K expansion RAM/ROM BLK 1 V2K OS ROM
4000-5FFF 16384-24575 8K expansion RAM/ROM BLK 2 V2K OS ROM
6000-7FFF 24576-32767 8K expansion RAM/ROM BLK 3 V2K OS ROM
8000-8FFF 32768-36863 4K Character ROM BLK 4
9000-93FF 36864-37887 I/O block 0 BLK 4
9400-95FF 37888-38399 COL RAM,BLK 1 filled BLK 4
9600-97FF 38400-38911 Normal COLOR RAM BLK 4
9800-9BFF 38912-39935 I/O block 2 BLK 4
9C00-9FFF 39936-40959 I/O block 3 BLK 4 V2K IO PORT (40000+)
A000-BFFF 40960-49152 8K Expansion ROM BLK 5 V2K OS ROM
C000-DFFF 49152-57343 8K BASIC ROM BLK 6
E000-FFFF 57344-65535 8K Kernal ROM BLK 7
I tried to fix the text in 3 different editors, but the forum does what it wants!!
Also correct about my basic program. I meant to have the poke after the counter wrap.
Buy hey man.... I am an assembly dude, high level confuses me!
Thanks for the comments, this forum is an amazing source of VIC expertise!
Imagine if we had this kind of community "back in the day".
I have a few hours today, so I am going to lay down the other 18 required 74HC138 demuxes.
My IO system requires a "one cold" out of 128 possible lines.
In other words, I will have 128 IO wires, and only one will be low at a time for one VIC cycle.
The address is split into nibbles, each half controlling one of two master 138s.
One master will be dedicated to Video Commands, and the other to Sound Commands.
Each of these masters then selects one of 8 other 138s.
So the Video Board has 64 IO lines, and so does the Sound Board.
If for some reason, I run low on IO lines, I can double up each master to get 128 lines per master.
I also plan to use IO Block-2 as for input.
The decode line will directly drive the OE of a 74HC574 acting as a "Data Accumulator".
Since external SRAM reading is too slow for a live bus turnaround and read, this will work better.
I will explain this much later. It will be based on work I did on my 6502 powered Vulcan-74 project.
I will demonstrate the 74HC138 IO output working soon, with 64 LEDs controlled by the VIC.
Since my test code will be getting longer, I am also going to dig out my 1541 drive.
Radical Brad