Denial

Posted: **Mon Sep 30, 2019 10:59 pm**

I'm really not as qualified as you guys but if I may contribute anything with scope captures or anything else to this thread then by all means, I am at your service.

This is, by very far, the most amazing thread I have ever read on any forum... ever. My hat off to you guys.

Posted: **Sun Aug 01, 2021 6:29 am**

There has been some intense discussion on Forum64 lately about the luma levels of VIC-I: "F64: VC20 Farbpalette als RGB Werte".

You need to be logged in to view attached images in full size or download attachments, and German is the forum language. I mirrored one of the images concerning the layout of the luma circuit:

lance.ewing wrote:[...]

Lance, if you happen to drop by, are there any news about your chip analysis? Joining forces with the people at F64 might be a good idea (they will correspond in English on occasion).

Greetings,

Michael

Posted: **Tue Sep 21, 2021 1:32 pm**

lance.ewing wrote: ↑Mon May 06, 2019 3:09 am [...]
As I discussed in that post from the older thread, this seems to make sense only if there is a pull up somewhere along the data line that is active when data is being read from a control register. I haven't yet found such a pull up, but it feels like it should be there somewhere, otherwise the above circuit (i.e. the first one drawn in logisim) has a way of pulling the data line LOW on Read, but when the register cell is in the other state, there would be nothing pulling the data line HIGH.
[...]

Sorry if this has already been answered, I could not find any more about this. (Although I must admit I did not look very hard.)
The bits on the internal data bus are pre-charged to logical 1 during one phase of the "2MHz" clock. So there is no pull-up.

I've illustrated this here in red. This is a gate that connects VCC above it to the data bus bit below.
(Picture is the die shot from vic20.de.)

FWIW the VIC-II chip in the C64 does something similar.

Posted: **Mon Feb 14, 2022 12:13 pm**

lance.ewing wrote: ↑Wed Nov 22, 2017 5:16 pm [...]
The only bit that doesn't make sense is that X=35 input. I've simulated this and VCNT.RESET goes high when X=35 on the LAST LINE. It doesn't make sense and clearly I have to check things over a few more times and try to work out why it doesn't reset at that point on the last line.

I'm going to leave it like that for now and will revisit this post to make amendments when I solve this mystery.

Was this ever resolved? I ran into the same issue the other day when I started to build a simulation of my own of the vertical counter and it would reset halfway line 311.

Posted: **Fri Mar 08, 2024 2:09 pm**

mathop wrote: ↑Mon Feb 14, 2022 12:13 pm
lance.ewing wrote: ↑Wed Nov 22, 2017 5:16 pm [...]
The only bit that doesn't make sense is that X=35 input. I've simulated this and VCNT.RESET goes high when X=35 on the LAST LINE. It doesn't make sense and clearly I have to check things over a few more times and try to work out why it doesn't reset at that point on the last line.

I'm going to leave it like that for now and will revisit this post to make amendments when I solve this mystery.
Was this ever resolved? I ran into the same issue the other day when I started to build a simulation of my own of the vertical counter and it would reset halfway line 311.

To answer my own question, the X=35 signal is connected to GND on the 6561, so it never fires.
See the comparison of the horizontal ROM of the 6560 (top) and 6561 (bottom) (pictures from vic20.de)
The circled bit is subtly different, there is an additional bit of metal that connects X=35 to GND.

Denial

6561 Die Shot Reversing Explorations

Re: 6561 Die Shot Reversing Explorations

Re: 6561 Die Shot Reversing Explorations

Re: 6561 Die Shot Reversing Explorations

Re: 6561 Die Shot Reversing Explorations

Re: 6561 Die Shot Reversing Explorations