IEC serial output bits

[bjonte]

I looked for the bits to control IEC devices and I get very confused by the VIA2PCR $912c register. Mapping the VIC seems to mess up the documentation here and I'm not sure how to control the CLK and DATA bits. Programmer's Reference Guide also isn't detailing this enough for me to understand. Both claim three bits each are controlling this somehow. What bits should be used? Is there anything I need to do to setup before I use them, like data direction or disabling shift registers?

[srowe]

This is a very good and detailed description of how the serial bus works

https://www.pagetable.com/?p=1135

You also need to familiarize yourself with the relevant parts of the schematic, the input and output are driven independently and the outputs go through an inverter.

The mapping of the lines to the VIAs is is follows

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VIA1PA1		= $9111		; VIA 1 DRA
					; bit	function
					; ---	--------
					;  7	serial ATN out
					;  1	serial DATA in
					;  0	serial CLK in

VIA2PCR		= $912C		; VIA 2 PCR
					; bit	function
					; ---	--------
					; 765	CB2 serial DATA out
					;  4	CB1 serial SRQ in
					; 321	CA2 serial CLK out

You shouldn't need to change the DDR, it is initialized correctly by the KERNAL.

[bjonte]

But this states three bits for a single line:

765 CB2 serial DATA out
321 CA2 serial CLK out

Which bit is it or how does it work if three bits are needed to set one output bit?

[srowe]

The PCR is described in detail in the 6522 datasheet but the serial routines only ever use the two values

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110  manual output mode, low
111  manual output mode, high

[Mike]

The 6522 datasheet, the VIC-20 schematic and a *good* ROM listing are your friends here. PRG and 'Mapping the VIC' at best count as secondary sources.

For what matters, the KERNAL contains several routines that set/reset the clock (CA2) and data (CB2) line outputs:

$EF84 - output CA2 low - clears bit 1 (value: 2) in $912C => 7406 inverter puts high level on serial clock line
$EF8D - output CA2 high - sets bit 1 (value: 2) in $912C => 7406 inverter puts dominant low level on serial clock line

$E4A0 - output CB2 low - clears bit 5 (value: 32) in $912C => 7406 inverter puts high level on serial data line
$E4A9 - output CB2 high - sets bit 5 (value: 32) in $912C => 7406 inverter puts dominant low level on serial data line

The other two bits of CA2 and CB2 in $912C have been initialised to manual output beforehand. This happens in the VIA init routine at $FDF9: $FE10 LDA #$DE/$FE12 STA $912C, which set CA2 = 1 and CB2 = 0.

Next question: what are you up to?

[bjonte]

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110  manual output mode, low
111  manual output mode, high

Ah, of course! How stupid of me. Thanks!

[bjonte]

Next question: what are you up to?

I'm porting my turbo loader to VIC20 in order to make multiplatform releases.

[Vic20-Ian]

Next question: what are you up to?

I'm porting my turbo loader to VIC20 in order to make multiplatform releases.

Cool - please enter it in The things we want to see / hear development competition

[bjonte]

Cool - please enter it in The things we want to see / hear development competition

I though this was some kind of joke I didn't understand until I saw the thread about it! The thing I'm working on now isn't official yet and will be exclusive to the members of the Swedish Commodore club so it doesn't really fit.

[Vic20-Ian]

Sorry to hear that it will be exclusive to members of another group if it could be useful to other members of the Denial community.

I thought as you were posting about it here and asking for help here that it would be available to Denial members too, hence the invitation to enter it into the competition.

[Mike]

I though this was some kind of joke I didn't understand until I saw the thread about it! The thing I'm working on now isn't official yet and will be exclusive to the members of the Swedish Commodore club so it doesn't really fit.

Just asking you if I understood this correctly: you solicited here for help, got answers and now are not willing to return the favour by letting the community here participate with the result?

[Vic20-Ian]

Einverstanden.

[Mike]

Einverstanden.

I am on my own side regarding this matter.

[bjonte]

Just asking you if I understood this correctly: you solicited here for help, got answers and now are not willing to return the favour by letting the community here participate with the result?

I'm afraid I have to confirm that. Not exactly a nice gesture. We will have some exclusive Swedish content for the club members. That said, I'm not only doing exclusive content for the club and not only club content either. You can see my first steps towards a multi platform release at https://csdb.dk/release/?id=202107 (Swedish text).

[bjonte]

We had a discussion about this today and decided to release it publicly some time after the exclusive access launch for members. I'll tell you what it is when it has been announced.