SuperCPU for the Vic-20

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plbyrd
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Re: SuperCPU for the Vic-20

Post by plbyrd »

The more you post, the more excited I get. It's great to see real hardware being tested.
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

A short update:

While we wait for the MachXO3L-9400, I have been debugging and preparing for PCB mounting and soldering. I have decided to order a fresh set of PCBs to get the first devices as streamlined as possible to prevent hand fixing.

The PCBs will be mounted with my freshly built openPNP machine and then reflow soldered in an oven. Connectors will be mounted manually. After PCB mount, softcores will be downloaded onto the cards through USB. They will then be tested and assembled into the laser cut case.

I have also started to program the VGA interface. In the start it will be a simple VIC simulation with 1280x720 output at 6X x-resolution and 3X y-resolution. This will give you 26 columns and 30 rows of output (208x240 pixels) as the maximum. I have deduced a fast two-pass 3X filter to improve the pixelated graphics, but it will be optional once I have made it into software. The whole point in having a VGA output is to be able to get (some) of your old games to play through that, but it is not simple and will take a lot of tweaking to get there... So patience is gold.

The 65C02 is compatible with the 6502, mostly. There are new instructions that replace the undocumented opcodes, and they execution is not cycle exact. So any time-critical routines or programming is going to break. Since its at least 25 times faster anyway, you probably don't care much.

I have also worked on my own c65n02 with a cut-down instruction set. The interesting part about it is that all instructions take 1 cycle and it runs at 100MHz. So 3-cycle instructions like "STA $2C,X" runs 300 times faster than on your Vic-20. At the moment development has a low priority, and the final version may be slightly slower, but the plan is to use it for some interesting co-processing like graphics or neural nets.
COREi64
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Re: SuperCPU for the Vic-20

Post by COREi64 »

This is really fantastic. Simply brilliant!

Count me in when you're ready!

Thomas
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Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Short update:

The new boards arrived last week and will be tested once the MaxhXO3L-9400ALV arrives. I have asked the supplier for an update as they should be shipped this week (12 week delivery time). Hopefully there are no more delays from Lattice.

The VGA display port is currently being tested. The code is still in alpha, but it now shows a 1280x1024 60Hz stable output (but with a few bugs). The pixel clock is 108MHz and memory access seems to work fine. The 3X code hasn't been implemented yet and there are two ways to do that: 1) On-the-fly pixel scaling or 2) Memory-map pixel scaling. One-the-fly scaling requires less memory than a full memory map, but is very process intensive and will consume more of the MachXO3's resources. I will probably end up testing both to see what works better.

On-the-fly scaling will be more critical with respect to raster-effects. E.g. to get NTSC raster effects correct, a 60Hz output will be needed and 50Hz for PAL. Since VGA is only 60Hz, this has to be emulated for PAL games. Its not impossible, but in practice it would involve frame-skipping (e.g. when PAL shows 5 frames, this would need to be showed 6 times on a VGA). That is purely due to timing to prevent PAL games from running faster.

On the other hand, memory-map pixel scaling can incorporate raster effects independent of screen refresh rate, since all gfx is handled in a separate bitmap. The memory requirements will be larger, requiring 22*8*3*23*8*3/8=36432 bytes of memory for the standard 1-color 22*23 character display. For 16 colors it requires 4 bits per pixel and thus about 146KBytes (or larger for larger displays).

I will post updates on the VGA once I have something that works. The long-term goal is to get the old games to show correctly with the VGA output.. at least some of them. :roll:
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Just a snapshot from the current VGA output of the SuperVixen 0.76:
IMG_6015.JPG
Some bugs remain, but generally it shows a character set from memory using a screen memory area (as for a Vic-20) with a separate color ram. There is no 3XHQ scaling yet, only nearest neighbour scaling.

The output is currently 1280x1024 with a 108MHz pixel clock.
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

My latest post autologged itself out, and insted I was given a login page and the post was sent to forum heaven.

A short summary of what was written:

There has been no answer from Lattice on the new MachXO3-9400 delivery, so they are late which is really annoying.

My Openbuilds PNP machine is nearly finished, so hopefully I can mount 10 boards more quickly once the MachXO3-9400 gets here...

The 65C02 will get the Vic-20 databus mirrored to $FFFD so that it can read everything that the 6502 cpu does and mirror this to the SuperVixen memory. The idea is that we can get the 6560 output on the VGA display without further tinkering. This will upgrade many old games that run on the Vic-20 to VGA. When the 3X filter gets going, we will also be able to experience higher resolution and better images from the old classics. Making them run on the internal 6502 will give 100% compability. Raster-effects are obviously not going to work, but I will continue to think of ways to do that. Well, thats the idea, anyhow. :wink:
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Ok. I have started checking around and it looks like Mouser was promised a dispatch date of 6.November, but still haven't recieved anything. I didn't order this from them, but it probably reflects the trouble Lattice has to get this component qualified.

Anyway, if Mouser gets some before my supplier I will immediately order from them as well, so to get things going.
Mobsie
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Re: SuperCPU for the Vic-20

Post by Mobsie »

Hi,
please add me to your list for 2.

Thanks
Mike
zorro
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Re: SuperCPU for the Vic-20

Post by zorro »

Hi,

i just heard about this piece of Hardware and would like to ask if it is still possible to get one.

Thanks and best regards,
Roland
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

First batch is sold out, but once that has been delivered I will make another batch. So you can confirm if you want one on this page, and you will be on the list.
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Mouser has helped me getting information from Lattice, and unfortunately the news are bad. The Machxo3-9400 has been cancelled and won't be offered to the public anymore. Its a strange move, but a lot of strange things are happening with lattice lately:
http://www.oregonlive.com/silicon-fores ... semic.html

I will continue to ask around a little, but for obvious reasons it seems like I will need to use the 6800 version instead. It means that the 3X filtering needs more memory to limit LUT resource usage. Shouldn't be a problem, but will take some time to implement.

With 1MiB SRAM on the card I will look at ways to make that available for the Vic-20 and 65C02 so we can get a full 35KB expansion from the Vic-20 side.
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

A short update:
I have been promised some MachXO3-9400 samples by a Lattice representative. That is if they exist. He could not promise any specific number, so I have decided to wait his reply before I start assembly.

Parallel to this I am trying to find good ways to get a 3X filter into the system without consuming all the memory. Its generally possible to use a 640x720 bitmap and put everything there, but its requires at least one extra buffer if I want to try to get (any) raster effect going.

Basic idea is (for now):
A 26 col x 30 row buffer (e.g. 208x240 pixel buffer) that is generated from what is stored into the VIC-I screen. This will need to track the original raster beam in order for (any) raster effect to be accurate. Since I am generating a VGA picture based on using the original screen + char map, the buffer can be made in more or less the same way.

Changes to the above buffer will activate changes in the 3X bitmap, one byte (8 pixels) at a time. Horizontally, 16 extra pixels will be generated in between these 8 pixels, and 2 extra lines of pixels in between the other lines. Each "generated" pixel is dependent on 5 of the closest original pixels, so that a change of one byte in the buffer bitmap, will affect up to 9 lines of 32 pixels in width. It therefore makes sense to "scan" through the 3X bitmap, one line at a time, at a given frequency, in order to prevent multiple overlapping changes in that. For the resolution at hand, an update frequency (per pixel) of 54MHz would make it smooth and without delay (at 60Hz). Achieving such speeds are very difficult though, so that is what the 3X bitmap is going to help with.

I will update here once I have some more news.
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Some very good news: :mrgreen: :mrgreen: :mrgreen:

The lattice representative has confirmed that they have sent me 10 sample of the Mach XO3-9400-C which (probably) constitutes a new packaging which supposedly fixes the thermal problem they initially had. I will run thermal tests to confirm this.

This means that I can start assembly with the new MachXO3 and it will give us more room for 3X filtering, SD card logic and other stuff. Now, all the software will take some time, so initially we will have to cope with VGA output without filtering. The good news with the 9400 is that the Vic-20 will see all memory areas as expansion memory (e.g. 37KiB) and the 65C02 will have 54KiB that can be run from both Vic-20 and 65C02 side at the same time. For obvious reasons, they do not share Zero page or stack (or any internal Vic-20 memory area that is).

Once everything has been assembled, I will start software debugging with the new MachXO3 and test:

- RAM access from Vic-20 and 65C02 side
- Vic-20 access stability
- 65C02 run speed vs stability
- Vic-20 databus read & translation --> VGA memory
- SRAM access from Vic-20 and 65C02 (this is not dual port, so only one at a time)

For compability, I will try to put all memory locations in the MachXO3 at the same place as the Vic-20. E.g. screen memory, registers and colormap will have the same memory address on both sides. Hopefully we can use this (later) to get the 65C02 to also run basic programs (ROM contents will have to be mirrored to SRAM for the 65C02).

Anyway, one step at a time. :roll:
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Schlowski
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Re: SuperCPU for the Vic-20

Post by Schlowski »

Sounds promising :)
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

The first 10 pcs of MachXO3-9400 are here :mrgreen: I don't think anyone else has gotten 10 samples of this IC at this point, so its kind of a world premiere. :roll:
MachXO3L-9400C.jpg
I was going to mount the first board this weekend, but my PNP machine needs a new valve so I am waiting for that.

Anyway, all is set for the first 10 cards, so once the first one has been thoroughly tested, I will run the rest as well (and test them).

The spec on the 9400 is about 9400LUTS and 54KiB which gives up to 37KiB of expansion to the Vic-20/6502 that can run with the 65C02 simultaneously. It should allow for some interesting experiments.

As for the VGA output I will try to use the decoded 6502 databus to pick up writes to the internal memory/registers of the Vic-20 and put the data into an external 6560/1 buffer. The goal is to make the VGA show the same thing as the internal VIC-I without using separate software routines to copy screen content. It will take some time to get this completed, so the VGA part is not going to be finished when the cards ship.

After shipping, upgrading the cards will require you to have a PC, an USB connection and a downloadable Lattice Programmer (win/linux) installed.
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