Denial

Yes, all of the stuff has to fit in an IO area, and preferably 1 of them (I can see folks wanting to use this cart alongside another than uses another IO bank, like VIC-MIDI or some other expansion IO cart. So, I don't think it's good to tie both 2kB IO areas up. I think it's a futile attempt to op...

And again, if these routines work for internal RAM, they also work for external RAM. Having the uC on the cartridge pumping data directly to/from the external RAM adds further complexity to the setup and would not strictly be necessary. I would defer that feature to a second iteration of the firmwa...

As an additional note, Sideloading the cartridges SRAM from the uC directly would without doubt be quicker. Probably an order of magnitude. However, it would require isolating the cartridge uC - SRAM bus from the VIC-20, and thus requiring additional electronics. The original idea I had 9 years ago...

[...] if the position was that one could use bog standard KERNAL API codes to load from the cart and somehow execute this unrolled code in IO2, I am at a loss on how that would be done, [...] That's exactly what the KERNAL vectors at $0314..$0333 are for, wedging into or replacing the relevant KERN...

Hmm, not sure I understand that, because code isn't going to know about "just exec io2, and your data will get loaded into memory" and if it does know that much, it's easy to just change that to "exec io2, which will slow load the internal RAM and sideload the RAM on the cart". ...

So, since the IO range is 1kB, [...] 2 KB, but one would simply choose an arrangement of register map, transfer code buffer and boilerplate code buffer most suitable for the task. I stand corrected. I hesitated to look it up, but laziness got the best of me [...] whatever the fastest non unrolled l...

Alliance has a 1MB SRAM that is 5V: https://www.digikey.com/product-detail/en/alliance-memory-inc/AS6C8008-55ZIN/1450-1039-ND/4234598 Yup! That's less than half the price of the Cypress equivalent. I'd recommend using the UltiMEM register structure. It allows RAM or ROM at a location, banks in all ...

I'd recommend using the UltiMEM register structure. It allows RAM or ROM at a location, banks in all the spots (3KB, BLK1,2,3,5, and IO2,3) and can write protect the RAM so it can be used like ROM. True. Only thing I'd wish for the UltiMEM II would be 256 memorized register sets so one can switch b...

I'd recommend using the UltiMEM register structure. It allows RAM or ROM at a location, banks in all the spots (3KB, BLK1,2,3,5, and IO2,3) and can write protect the RAM so it can be used like ROM. True. Only thing I'd wish for the UltiMEM II would be 256 memorized register sets so one can switch b...

So, since the IO range is 1kB, and lda #$xx;sta $xxxx = 5 bytes, that means you cna store ~200 bytes this way. Then, you'd need to trigger another unroll of code. COmpared to lda $io2_base ; sta location,x ; inx ; bne loop ; inc $xxxx ; cmp $xx ; bne loop, or whatever the fastest non unrolled loop o...

Alliance has a 1MB SRAM that is 5V: https://www.digikey.com/product-detail/en/alliance-memory-inc/AS6C8008-55ZIN/1450-1039-ND/4234598 I'd recommend using the UltiMEM register structure. It allows RAM or ROM at a location, banks in all the spots (3KB, BLK1,2,3,5, and IO2,3) and can write protect the ...

The bulk of the unit is the 16c450 UART, which is described here: http://web.mit.edu/6.115/www/document/16c450.pdf The unit operates at 18.432MHz, so it can handle MIDI and RS232 rates up to 230K and beyond. The registers, by default are at IO3 (depending on the setting of S1, which is not normally ...

I'm always here to answer questions. The only fault I'm aware of is that the two switches don't have pull up resistors. Not always a problem, but can be added if needed. Almost all units have the resistors installed, but a few got out before I noticed. I designed the cart for Leif and friends, and i...

It was a comment made in jest (I know my programming skills, and they will probably not be able to deliver the outcome you're suggesting) :-). I forgot the smiley. No ill will intended. But, yes, I wouldn't post here if I did not want discourse on the project. And, I am hopeful that this mod will su...

You may be underestimating my programming skills. In any event, one hurdle remains. I need to timeslice the memory access system so that I can fit a pull of color memory during the VIC half cycle. I've put a fast oscillator into the board now (footprint was already there), and am working on that asp...