Denial

yes, for sure, but you will have to solder a wire to the reset path. I have free pins on the header.

At the end this will work with my memory expansion board that will handle the reset.

The switching is done with a single POKE, then you have to reset the computer. The clocks are generated on the board, so the xtal on the motherboard can be remove to make the switcher sit lower. I have the signal generate to switch the kernal, I'm doing the little PCB to be used in the kernal socket...

@avsars Mike sum up the challenge with adding memory visible to the VIC chip, but, I made a prototype circuit that will fix this problem. It will also be solderless and plug and play, with additional VRAM banks. But I have to finish this ram expansion first. I also add a nice feature ( I think :D ) ...

I didn't yet. I want to complete the basic setup, then i'll make some tests.

Indeed that Ultimem never been used at its full power ; I will keep mine simple and no fancy goodies. Just an internal way to
have expanded memory and kernal variant without clogging the expansion port.

A little update. I modified the menus. In the ram section, you can add as needed the RAM123 and/or IO2-3 with any 8k-16-24 and 32k config. In the ROM menu, I added an option to have a second basic rom. So with the OEM Kernal, it left 3 slots for other Kernal.

The choices are colorize in green.

Thanks Mike for the inputs, I'm gonna go read the topic with Jim to see how it goes. I wanted to keep the banking sample to avoid too much possibility and void compatibility problem but, if the programmer can control the banking behind the curtain as he want, this may do the trick. Also, the bank sw...

So being able to map, let's say two extra 8k blocks to BLK1, and four 8k blocks to BLK2 could be a case ? I'm trying to figure out real world application and how to implement this in the CPLD with the remaining resources.

I had a question about memory banking. I want to keep it simple and not have a zillion of choices. Would it be better to map 8k x 8 banks to a specified address BLK, or having 16k x 4 banks across 2 consecutives address BLK ( i.e BLK1-BLK2 )? Any idea would be appreciated. About the development, all...

No welding required [...] Actually, I'd hope so. :shock: Yes, of course. I had to use SMD parts because I wanted to have the smallest footprint inside the vic20, so a 4 layers pcb was also needed. As I think the pun got lost on that one - there's a clear distinction between soldering and welding. S...

Rich wrote: ↑Mon Nov 13, 2023 2:06 pm The world has gone mad on chip prices.

I agree, but beside the cpld, the remaining chips are quite cheap.

No welding required [...] Actually, I'd hope so. :shock: BTW, that's an interesting date code (1837) on that "MOS" 65?02 CPU. :} Yes, of course. I had to use SMD parts because I wanted to have the smallest footprint inside the vic20, so a 4 layers pcb was also needed. About the strange cp...

mingle wrote: ↑Mon Nov 13, 2023 3:22 am Amazing work... This looks great.

Any idea as to how much $$$ this will be?

thanks, no price yet, but it will be the bare minimum as I'm doing this as an hobby.

As cold weather coming up here, I intend to complete this little project.. There are many ram/rom expansions out in the wild, but most of them suffer from two problems ( IMO ). First, it use the expansion port, so without a port expander, your port is 'dedicate' to it. Secondly, it use dip switches ...

DrVeryEvil wrote: ↑Mon Oct 30, 2023 10:47 am I'm curious what you have there?

still cooking atm, i'll start a thread when it will be ready , to not to highjack the thread.

I'm thinking about building a board with a 6560 as a video card that plugs into the 6560 socket that would have more capabilities than the standard VIC 20 circuit. I think this is the best way. I'm finishing a little project on the CPU side, and I made a daughterboard which give me access to everyt...